Module Definition
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Module : dti_mux21
SCORELINECONDTOGGLEFSMBRANCHASSERT
86.11 100.00 58.33 100.00

Source File(s) :
/nfs_project/gemini/DV/mahmood/all_tests_main/gemini/design/mem_ss/../ip/dti/libs/dti_tm16_phy/hdl/library/dti_tm16ffc_16f96_9t_stdcells_rev1p0p0_pwr.v

Module self-instances :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst34.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst46.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst47.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst52.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst58.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst59.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst95.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst101.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst104.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst106.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst138.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst156.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst161.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst163.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst197.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst224.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst231.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst232.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst241.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst243.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst248.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst252.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst254.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst260.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst271.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst273.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst277.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst300.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst308.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst314.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst318.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst321.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst343.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst344.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst348.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst351.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst353.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst354.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst370.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst376.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst379.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst386.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst394.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst400.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst405.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst432.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst445.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst462.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst503.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst533.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst545.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst558.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst568.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst584.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst591.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst598.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst601.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst607.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst619.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst643.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst649.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst653.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst658.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst664.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst691.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst693.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst707.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst709.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst710.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst711.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst713.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst724.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst739.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst746.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst775.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst798.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst816.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst856.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst858.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst869.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst895.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst914.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst917.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst921.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst938.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst950.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst953.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst954.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst965.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst969.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1001.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1003.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1011.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1022.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1028.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1040.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1063.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1094.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1095.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1103.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1112.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1115.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1118.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1157.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1164.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1166.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1181.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1188.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1197.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1217.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1222.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1228.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1239.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1252.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1254.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1272.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1280.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1315.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1329.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1336.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1354.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1359.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1361.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1408.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1413.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1415.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1421.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1429.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1439.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1446.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1469.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1472.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1479.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1490.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1496.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1498.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1506.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1538.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1545.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1564.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1572.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1574.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1584.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1587.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1593.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1611.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1618.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1628.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1634.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1651.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1656.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1660.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1684.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1688.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1689.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1706.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1707.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1734.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1742.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1745.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1765.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1789.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1818.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1820.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1843.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1854.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1858.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1870.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1875.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1879.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1905.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1909.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1912.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1920.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1921.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1927.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1941.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1947.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1962.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1963.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1974.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1975.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst1980.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2003.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2018.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2044.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2048.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2065.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2083.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2084.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2133.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2144.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2193.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2205.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2210.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2211.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2212.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2221.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2239.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2274.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2295.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2298.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2303.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2379.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2402.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2411.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2413.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2418.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2420.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2438.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2443.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2451.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2456.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2463.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2464.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2467.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2488.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2489.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2491.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2550.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2552.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2561.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2568.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2581.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2633.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2665.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2680.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2688.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2696.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2699.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2708.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2725.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2749.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2755.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2759.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2764.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2772.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2793.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2820.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2847.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2850.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2851.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2860.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2868.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2898.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2938.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2941.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2945.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2963.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2970.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst2980.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3002.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3008.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3011.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3026.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3027.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3070.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3087.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3100.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3109.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3123.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3135.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3145.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3146.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3152.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3156.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3175.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3176.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3187.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3201.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3210.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3255.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3261.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3293.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3301.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3309.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3319.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3343.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3344.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3362.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3384.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3387.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3388.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3389.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3394.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3397.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3405.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3436.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3439.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3444.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3464.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3478.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3517.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3518.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3519.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3546.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3552.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3562.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3591.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3615.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3622.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3643.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3650.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3658.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3682.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3687.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3721.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3731.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3741.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3742.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3759.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3761.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3762.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3766.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3769.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3786.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3789.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3796.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3804.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3834.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3835.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3839.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3842.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3843.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3847.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3876.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3881.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3887.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3895.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3901.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3904.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3920.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3925.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3943.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3946.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3948.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3957.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3969.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3979.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst3981.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4013.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4016.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4018.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4022.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4026.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4033.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4036.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4042.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4046.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4050.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4072.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4076.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4086.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4097.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4127.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4132.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4151.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4152.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4170.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4197.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4208.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4211.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4212.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4232.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4246.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4253.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4255.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4262.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4269.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4285.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4286.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4295.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4316.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4319.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4321.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4324.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4340.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4383.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4403.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4433.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4436.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4451.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4514.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4537.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4552.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4558.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4563.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4565.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4570.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4580.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4585.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4589.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4590.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4606.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4614.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4662.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4671.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4725.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4738.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4771.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4772.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4773.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4774.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4777.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4801.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4805.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4809.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4812.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4844.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4846.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4856.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4869.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4872.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4884.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4887.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4890.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4894.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4905.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4914.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4920.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4923.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4943.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4951.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4952.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4963.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4982.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst4996.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5032.xdti_16f_9t_96_ckmux21.xmux21 44.44 50.00 33.33 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5034.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5038.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5039.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5040.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5055.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5106.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5110.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5115.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5119.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5126.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5139.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5145.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5148.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5149.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5151.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5167.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5176.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5177.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5225.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5235.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5240.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5243.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5247.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5255.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5256.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5266.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5287.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5302.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5316.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5321.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5334.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5339.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5344.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5352.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5356.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5360.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5366.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5368.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5401.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5413.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5426.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5436.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5443.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5450.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5485.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5493.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5521.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5527.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5541.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5551.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5560.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5563.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5578.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5600.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5603.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5606.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5621.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5628.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5643.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5657.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5693.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5694.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5697.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5700.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5705.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5719.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5752.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5776.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5778.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5781.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5782.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5796.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5802.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5849.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5853.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5855.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5866.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5871.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5889.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5903.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5909.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5912.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5917.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5932.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5951.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5974.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst5988.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6022.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6039.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6047.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6052.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6069.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6072.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6079.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6094.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6127.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6129.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6135.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6159.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6165.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6187.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6198.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6238.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6248.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6254.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6259.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6267.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6279.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6293.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6294.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6300.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6308.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6320.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6340.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6374.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6379.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6396.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6400.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6425.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6428.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6436.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6450.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6451.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6453.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6474.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6475.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6479.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6482.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6489.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6495.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6518.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6522.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6530.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6537.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6538.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6550.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6551.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6593.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6611.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6638.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6650.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6652.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6762.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6763.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6764.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6783.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6792.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6799.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6806.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6810.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6820.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6823.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6860.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6882.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6890.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6903.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6909.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6927.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6957.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6962.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6970.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6980.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst6992.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7022.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7025.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7028.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7043.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7053.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7067.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7077.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7085.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7088.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7100.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7103.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7109.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7111.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7122.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7127.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7144.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7145.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7155.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7180.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7195.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7210.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7220.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7242.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7247.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7249.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7256.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7275.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7283.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7299.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7303.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7307.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7316.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7320.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7327.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7337.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7350.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7355.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7366.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7375.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7384.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7399.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7426.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7442.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7445.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7458.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7459.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7468.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7476.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7490.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7508.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7545.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7558.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7591.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7599.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7636.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7641.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7669.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7676.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7700.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7717.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7738.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7744.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7756.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7773.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7774.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7775.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7788.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7789.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7801.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7814.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7815.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7825.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7828.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7832.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7854.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7911.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7918.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7924.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7940.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7944.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7964.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7975.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7977.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7979.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst7999.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8001.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8005.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8008.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8011.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8060.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8061.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8083.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8086.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8091.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8106.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8115.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8121.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8131.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8141.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8154.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8178.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8186.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8231.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8232.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8237.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8257.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8298.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8319.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8337.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8340.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8352.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8380.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8389.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8416.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8417.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8423.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8443.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8449.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8465.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8468.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8480.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8490.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8517.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8528.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8530.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8539.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8546.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8552.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8567.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8569.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8573.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8578.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8592.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8614.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8615.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8626.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8647.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8649.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8667.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8678.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8705.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8730.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8732.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8763.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8766.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8784.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8797.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8798.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8814.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8819.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8833.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8838.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8843.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8845.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8852.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8853.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8854.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8859.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8866.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8867.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8870.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8879.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8883.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8896.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8907.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8912.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8917.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8923.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8928.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8931.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8942.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8952.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8978.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8981.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8987.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst8999.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9003.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9007.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9015.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9018.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9021.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9031.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9057.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9062.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9087.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9098.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9099.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9110.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9126.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9130.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9140.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9141.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9146.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9157.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9182.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9185.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9189.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9208.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9244.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9257.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9273.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9282.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9313.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9317.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9324.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9325.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9330.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9335.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9351.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9352.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9357.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9373.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9386.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9398.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9399.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9403.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9407.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9429.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9438.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9444.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9446.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9450.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9469.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9480.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9494.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9496.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9500.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9504.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9521.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9534.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9559.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9583.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9587.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9599.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9600.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9605.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9608.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9624.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9628.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9639.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9647.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9680.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9683.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9692.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9705.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9707.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9712.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9743.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9749.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9772.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9783.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9790.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9813.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9815.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9824.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9829.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9831.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9832.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9837.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9844.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9848.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9850.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9852.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9861.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9867.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9868.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9871.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9880.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9892.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9903.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9915.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9924.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9926.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9941.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9949.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9958.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9960.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9965.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9966.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9968.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst9973.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10013.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10016.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10020.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10042.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10045.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10050.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10056.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10077.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10089.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10097.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10108.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10126.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10131.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10132.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10133.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10144.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10169.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10178.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10180.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10197.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10210.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10212.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10221.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10232.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10238.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10251.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10274.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10290.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10296.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10298.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10299.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10315.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10316.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10346.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10350.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10384.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10389.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10397.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10405.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10414.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10463.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10464.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10477.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10481.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10482.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10492.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10493.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10501.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10520.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10522.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10528.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10538.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10554.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10556.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10560.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10561.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10564.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10572.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10578.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10585.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10588.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10594.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10599.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10605.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10613.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10621.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10629.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10634.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10641.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10645.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10652.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10665.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10698.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10717.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10719.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10724.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10728.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10731.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10742.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10774.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10775.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10793.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10794.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10799.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10807.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10817.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10852.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10857.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10877.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10902.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10941.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10944.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10947.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10958.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10967.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10968.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10969.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10980.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10987.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10989.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst10991.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11011.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11017.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11040.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11041.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11058.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11061.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11072.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11105.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11114.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11116.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11124.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11141.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11149.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11153.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11157.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11172.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11176.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11189.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11199.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11204.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11208.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11209.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11213.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11216.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11231.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11233.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11247.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11258.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11268.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11278.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11287.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11307.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11309.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11311.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11315.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11318.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11332.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11349.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11353.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11356.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11390.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11411.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11426.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11435.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11438.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11439.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11441.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11450.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11457.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11461.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11485.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11497.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11498.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11509.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11512.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11518.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11526.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11530.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11539.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11576.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11587.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11599.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11607.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11612.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11615.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11622.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11632.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11635.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11674.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11678.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11686.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11695.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11696.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11700.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11712.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11713.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11720.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11721.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11731.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11734.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11735.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11746.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11756.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11764.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11791.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11795.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11798.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11820.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11823.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11839.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11861.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11894.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11896.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11915.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11950.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11962.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11967.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11973.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11979.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11994.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst11996.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12012.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12020.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12025.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12049.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12058.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12083.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12100.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12101.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12103.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12117.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12135.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12153.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12154.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12184.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12197.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12208.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12222.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12232.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12271.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12278.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12279.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12283.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12297.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12314.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12334.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12386.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12397.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12411.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12433.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12456.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12463.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12481.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12492.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12500.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12514.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12579.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12582.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12616.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12622.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12624.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12638.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12639.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12642.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12643.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12652.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12653.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12673.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12674.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12687.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12688.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12712.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12727.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12729.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12730.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12749.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12750.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12754.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12762.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12768.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12783.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12789.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12812.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12831.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12835.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12868.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12881.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12897.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12901.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12912.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12915.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12920.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12921.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12923.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12925.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12931.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12941.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12949.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12967.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12971.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst12975.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13003.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13017.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13037.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13052.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13068.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13076.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13100.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13105.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13113.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13117.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13129.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13148.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13183.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13184.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13193.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13215.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13228.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13229.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13241.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13244.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13252.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13255.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13262.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13281.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13283.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13291.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13293.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13305.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13309.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13357.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13404.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13436.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13444.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13465.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13472.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13491.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13494.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13495.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13497.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13517.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13518.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13521.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13532.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13541.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13542.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13547.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13556.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13557.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13572.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13598.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13599.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13604.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13608.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13609.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13617.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13620.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13626.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13633.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13651.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13657.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13660.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13677.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13689.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13698.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13705.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13741.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13743.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13745.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13768.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13792.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13804.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13812.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13817.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13820.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13822.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13833.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13846.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13851.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13852.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13907.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13909.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13919.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13925.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13929.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13939.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13958.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst13972.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14020.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14026.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14045.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14049.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14068.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14073.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14079.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14094.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14121.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14122.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14123.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14146.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14158.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14162.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14168.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14178.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14189.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14195.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14205.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14227.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14232.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14254.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14258.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14260.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14298.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14304.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14327.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14373.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14389.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14399.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14412.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14438.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14467.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14473.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14512.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14526.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14527.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14536.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14592.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14600.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14612.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14618.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14632.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14637.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14664.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14678.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14679.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14688.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14713.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14714.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14718.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14722.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14744.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14753.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14755.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14776.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14789.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14795.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14808.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14812.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14833.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14840.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14845.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14868.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14883.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14908.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14915.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14923.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14970.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14978.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14979.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst14994.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15018.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15025.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15030.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15031.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15034.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15038.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15052.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15062.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15073.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15081.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15085.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15094.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15100.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15116.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15156.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15168.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15169.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15180.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15192.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15216.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15230.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15241.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15246.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15276.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15285.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15291.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15306.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15333.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15347.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15359.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15388.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15400.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15407.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15427.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15428.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15430.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15480.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15488.xdti_16f_9t_96_mux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15497.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15512.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15513.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15521.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15536.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15538.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15547.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15550.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15555.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15562.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15565.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15579.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15584.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15590.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15592.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15595.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15599.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15637.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15644.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15647.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15656.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15676.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15677.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15680.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15684.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15731.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15747.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15758.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15773.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15806.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15817.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15825.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15832.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15838.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15841.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15846.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15850.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15896.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15925.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15942.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15945.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15956.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15974.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15979.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15980.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15984.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15989.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst15998.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16014.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16072.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16108.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16119.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16127.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16149.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16167.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16178.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16192.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16194.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16231.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16232.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16256.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16271.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16272.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16285.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16287.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16291.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16298.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16321.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16330.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16360.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16362.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16367.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16371.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16382.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16387.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16391.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16408.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16416.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16429.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16469.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16483.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16491.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16495.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16504.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16505.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16551.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16554.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16566.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16567.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16572.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16573.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16594.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16607.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16611.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16612.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16615.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16619.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16620.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16655.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16659.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16674.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16695.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16705.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16712.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16725.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16727.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16738.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16752.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16773.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16774.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16786.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16787.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16789.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16790.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16797.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16802.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16809.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16839.xdti_16f_9t_96_mux21 44.44 50.00 33.33 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16896.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16900.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16916.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16926.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16948.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16953.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16957.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16960.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16965.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16967.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16981.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst16999.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17008.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17017.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17020.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17025.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17030.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17048.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17050.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17067.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17082.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17089.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17093.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17107.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17108.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17111.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17115.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17116.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17117.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17136.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17181.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17185.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17196.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17197.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17227.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17236.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17240.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17246.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17247.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17248.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17267.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17268.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17269.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17276.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17299.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17320.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17322.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17330.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17332.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17340.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17342.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17343.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17346.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17361.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17387.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17408.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17412.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17417.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17447.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17480.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17488.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17506.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17512.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17514.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17544.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17559.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17560.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17563.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17584.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17609.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17620.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17629.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17632.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17644.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17673.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17735.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17737.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17743.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17755.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17768.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17769.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17771.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17776.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17780.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17784.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17806.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17822.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17823.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17831.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17834.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17840.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17875.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17891.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17896.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17900.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17905.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17919.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17927.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst17944.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18004.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18017.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18025.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18031.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18042.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18062.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18080.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18085.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18104.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18108.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18114.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18128.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18157.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18161.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18162.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18164.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18166.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18179.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18186.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18210.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18225.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18226.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18236.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18257.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18261.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18287.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18290.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18312.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18315.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18326.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18347.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18355.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18360.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18366.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18379.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18386.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18388.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18406.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18428.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18432.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18474.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18477.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18483.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18485.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18491.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18501.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18505.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18529.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18530.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18538.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18540.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18569.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18576.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18590.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18600.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18611.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18613.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18624.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18630.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18633.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18640.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18655.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18663.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18670.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18673.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18684.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18688.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18713.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18765.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18785.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18786.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18793.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18794.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18804.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18817.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18831.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18833.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18843.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18854.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18857.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18860.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18876.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18878.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18879.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18880.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18882.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18888.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18898.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18923.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18928.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18932.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18942.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18947.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18949.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18954.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18965.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18972.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18978.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18986.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst18988.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19002.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19010.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19020.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19030.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19035.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19040.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19044.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19048.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19050.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19057.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19070.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19072.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19075.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19080.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19082.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19090.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19098.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19099.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19117.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19133.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19137.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19146.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19162.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19167.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19182.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19193.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19222.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19224.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19237.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19244.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19250.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19253.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19258.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19262.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19271.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19272.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19302.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19308.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19309.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19325.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19330.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19338.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19339.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19349.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19354.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19371.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19377.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19387.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19390.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19408.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19412.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19413.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19422.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19436.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19449.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19453.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19457.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19466.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19475.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19483.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19496.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19523.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19531.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19539.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19544.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19547.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19574.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19579.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19587.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19662.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19663.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19671.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19672.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19680.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19688.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19709.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19723.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19751.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19753.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19754.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19780.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19813.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19833.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19848.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19867.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19893.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19922.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19929.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19945.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19952.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst19958.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20007.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20017.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20042.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20048.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20057.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20073.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20080.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20085.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20090.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20094.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20132.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20134.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20135.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20136.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20137.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20148.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20150.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20154.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20168.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20181.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20184.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20198.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20201.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20209.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20210.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20212.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20231.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20237.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20242.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20246.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20248.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20255.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20261.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20262.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20300.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20306.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20329.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20367.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20382.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20405.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20409.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20411.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20415.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20416.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20423.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20433.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20436.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20443.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20453.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20455.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20457.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20463.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20493.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20499.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20501.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20508.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20511.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20526.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20539.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20547.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20550.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20555.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20605.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20613.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20619.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20620.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20627.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20629.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20636.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20647.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20648.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20654.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20664.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20685.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20697.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20709.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20715.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20717.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20722.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20734.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20744.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20762.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20783.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20800.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20817.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20839.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20845.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20863.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20873.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20877.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20879.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20883.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20891.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20899.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20910.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20912.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20914.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20915.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20939.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20954.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20955.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20957.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20964.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20973.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20974.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst20996.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21003.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21012.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21014.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21016.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21023.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21034.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21042.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21045.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21048.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21055.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21063.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21097.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21103.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21115.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21117.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21122.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21134.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21142.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21151.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21158.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21160.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21165.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21169.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21195.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21231.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21237.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21256.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21274.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21297.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21300.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21302.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21310.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21330.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21340.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21360.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21366.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21368.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21372.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21395.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21401.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21422.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21461.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21462.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21475.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21481.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21497.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21498.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21515.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21537.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21546.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21588.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21598.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21612.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21618.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21620.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21630.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21635.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21653.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21665.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21667.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21668.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21669.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21673.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21677.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21687.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21689.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21690.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21693.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21696.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21698.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21715.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21729.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21735.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21742.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21788.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21796.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21814.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21833.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21841.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21842.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21853.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21866.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21869.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21879.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21888.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21892.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21927.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21935.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21940.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21962.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21974.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21978.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21979.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst21991.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22045.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22051.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22060.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22074.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22078.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22079.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22093.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22103.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22144.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22146.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22148.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22155.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22160.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22169.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22170.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22171.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22176.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22186.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22210.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22217.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22224.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22235.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22241.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22266.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22279.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22296.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22305.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22336.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22340.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22343.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22357.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22364.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22373.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22379.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22405.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22414.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22416.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22417.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22467.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22484.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22492.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22496.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22498.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22501.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22517.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22530.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22531.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22561.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22569.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22570.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22590.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22601.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22623.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22643.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22647.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22650.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22655.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22665.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22672.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22680.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22698.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22699.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22709.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22712.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22722.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22728.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22730.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22747.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22750.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22751.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22756.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22761.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22763.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22797.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22820.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22827.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22862.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22868.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22878.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22880.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22883.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22891.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22929.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22932.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22934.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22954.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22960.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22970.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst22980.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23003.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23013.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23014.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23031.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23060.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23080.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23088.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23092.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23095.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23104.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23107.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23108.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23110.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23113.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23151.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23154.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23171.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23184.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23215.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23216.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23221.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23224.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23225.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23238.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23265.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23289.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23293.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23312.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23318.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23334.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23341.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23355.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23357.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23367.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23370.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23371.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23372.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23379.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23386.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23389.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23395.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23403.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23407.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23442.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23465.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23469.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23480.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23481.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23487.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23496.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23502.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23521.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23526.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23527.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23532.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23534.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23541.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23555.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23562.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23569.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23582.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23585.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23603.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23604.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23610.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23613.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23618.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23619.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23635.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23645.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23679.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23684.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23687.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23689.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23709.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23713.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23723.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23732.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23746.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23772.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23806.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23809.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23824.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23829.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23836.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23850.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23860.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23862.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23915.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23929.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23934.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23941.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23963.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23977.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23992.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst23996.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24014.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24027.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24031.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24037.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24090.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24103.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24109.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24122.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24125.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24135.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24159.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24171.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24185.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24198.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24213.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24222.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24234.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24236.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24237.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24238.xdti_16f_9t_96_mux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24245.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24260.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24268.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24271.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24289.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24290.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24291.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24311.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24329.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24337.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24352.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24364.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24369.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24387.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24400.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24433.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24440.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24441.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24460.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24465.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24474.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24475.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24489.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24494.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24512.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24556.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24558.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24587.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24594.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24595.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24599.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24615.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24618.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24620.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24643.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24653.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24669.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24690.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24700.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24703.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24708.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24713.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24714.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24728.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24745.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24748.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24755.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24781.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24800.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24817.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24829.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24835.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24836.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24840.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24850.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24869.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24881.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24882.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24892.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24905.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24907.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24909.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24914.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24920.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24929.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24932.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24940.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24944.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24951.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24969.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst24971.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25015.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25021.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25034.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25036.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25038.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25042.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25047.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25061.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25070.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25071.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25073.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25083.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25092.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25108.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25109.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25114.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25121.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25136.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25157.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25160.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25177.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25225.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25232.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25237.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25245.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25260.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25261.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25273.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25294.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25325.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25326.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25340.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25377.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25396.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25403.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25407.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25419.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25420.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25424.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25430.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25460.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25481.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25512.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25513.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25524.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25534.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25537.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25542.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25543.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25552.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25556.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25568.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25575.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25578.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25589.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25592.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25621.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25625.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25626.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25657.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25664.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25673.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25682.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25733.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25737.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25752.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25760.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25786.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25787.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25790.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25801.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25807.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25832.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25842.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25867.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25869.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25871.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25878.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25894.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25915.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25920.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25923.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25938.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25968.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25977.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25983.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25987.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25988.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25993.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst25998.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26000.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26005.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26009.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26015.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26034.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26037.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26043.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26045.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26049.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26055.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26059.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26064.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26092.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26101.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26106.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26111.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26112.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26145.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26146.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26159.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26162.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26187.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26208.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26212.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26213.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26215.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26223.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26225.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26231.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26236.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26241.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26247.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26259.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26279.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26296.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26302.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26318.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26323.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26329.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26349.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26364.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26365.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26373.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26381.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26413.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26420.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26431.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26446.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26447.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26452.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26455.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26462.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26489.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26493.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26506.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26513.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26522.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26546.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26550.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26569.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26592.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26600.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26605.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26611.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26645.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26661.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26665.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26675.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26681.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26682.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26690.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26692.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26705.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26719.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26732.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26745.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26757.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26765.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26794.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26803.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26804.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26805.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26834.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26839.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26864.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26866.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26869.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26887.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26889.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26893.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26895.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26907.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26935.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26970.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26982.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst26997.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27019.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27039.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27046.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27052.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27074.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27091.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27094.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27100.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27119.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27142.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27143.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27146.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27168.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27202.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27203.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27209.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27210.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27232.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27239.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27244.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27271.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27272.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27290.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27293.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27297.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27316.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27319.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27327.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27347.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27349.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27363.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27380.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27397.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27432.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27434.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27445.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27460.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27478.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27494.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27497.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27499.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27508.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27529.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27577.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27580.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27584.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27587.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27593.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27607.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27608.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27612.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27613.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27637.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27653.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27657.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27661.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27681.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27685.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27692.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27699.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27707.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27725.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27771.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27803.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27808.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27812.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27819.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27821.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27843.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27848.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27857.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27866.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27867.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27886.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27891.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27905.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27922.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27927.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27952.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27962.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst27976.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28009.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28029.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28070.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28072.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28076.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28081.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28088.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28106.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28121.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28134.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28141.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28147.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28150.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28153.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28181.xdti_16f_9t_96_mux21 44.44 50.00 33.33 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28184.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28196.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28204.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28214.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28217.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28256.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28262.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28266.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28278.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28289.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28294.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28308.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28314.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28329.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28335.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28349.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28354.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28392.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28398.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28407.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28417.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28431.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28434.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28435.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28442.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28446.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28452.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28453.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28461.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28466.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28470.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28506.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28509.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28531.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28532.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28595.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28638.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28639.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28652.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28657.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28672.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28674.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28684.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28715.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28736.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28737.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28743.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28751.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28753.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28776.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28791.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28808.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28816.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28848.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28864.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28883.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28888.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28902.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28907.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28914.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28922.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28928.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28935.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28936.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28943.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28960.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28967.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28976.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28988.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst28997.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29003.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29007.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29018.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29028.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29037.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29052.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29053.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29060.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29069.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29072.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29085.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29129.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29132.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29137.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29149.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29153.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29183.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29187.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29191.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29211.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29212.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29226.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29258.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29260.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29293.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29298.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29303.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29308.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29311.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29314.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29319.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29334.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29349.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29390.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29407.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29421.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29424.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29460.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29498.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29509.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29533.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29536.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29538.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29546.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29579.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29598.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29621.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29622.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29626.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29629.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29669.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29679.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29694.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29726.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29727.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29730.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29741.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29745.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29747.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29762.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29784.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29785.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29786.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29814.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29822.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29830.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29865.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29909.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29932.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29957.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29962.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29966.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29968.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29989.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst29998.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30007.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30020.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30024.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30040.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30043.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30046.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30047.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30058.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30076.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30080.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30082.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30088.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30096.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30112.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30129.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30145.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30148.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30157.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30163.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30170.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30176.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30179.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30193.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30196.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30204.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30232.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30234.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30239.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30240.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30244.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30261.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30298.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30323.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30335.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30348.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30351.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30384.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30400.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30405.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30451.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30488.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30491.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30508.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30517.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30537.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30557.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30578.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30584.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4_18d_ctl30s2ckr2_jm.xinst30588.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst27.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst30.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst31.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst32.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst35.xdti_16f_9t_96_mux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst47.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst68.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst86.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst95.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst96.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst100.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst103.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst104.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst111.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst113.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst117.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst120.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst127.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst131.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst137.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst144.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst145.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst151.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst161.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst162.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst166.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst172.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst180.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst186.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst193.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst197.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst209.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst217.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst218.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst222.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst229.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst231.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst234.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst240.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst256.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst266.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst267.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst270.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst283.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst311.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst315.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst322.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst330.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst333.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst338.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst351.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst355.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst357.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst372.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst378.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst413.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst417.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst424.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst441.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst442.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst459.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst469.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst491.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst494.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst497.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst504.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst507.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst520.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst531.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst538.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst544.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst560.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst571.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst580.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst587.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst592.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst603.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst612.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst623.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst626.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst629.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst635.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst643.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst661.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst673.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst677.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst681.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst687.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst691.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst723.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst724.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst730.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst740.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst747.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst755.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst757.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst763.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst787.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst803.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst806.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst809.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst812.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst828.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst849.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst850.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst858.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst867.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst869.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst871.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst876.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst883.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst891.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst899.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst907.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst908.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst912.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst914.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst915.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst919.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst927.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst969.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst971.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst984.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1005.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1018.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1019.xdti_16f_9t_96_mux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1023.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1028.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1036.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1056.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1061.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1062.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1066.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1067.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1068.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1069.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1084.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1092.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1093.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1094.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1097.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1116.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1119.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1129.xdti_16f_9t_96_mux21 72.22 100.00 16.67 100.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1131.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1142.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1156.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1205.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1208.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1220.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1245.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1246.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1265.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1278.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1291.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1292.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1301.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1337.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1338.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1341.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1342.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1347.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1358.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1368.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1378.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1381.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1384.xdti_16f_9t_96_mux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1391.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1395.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1397.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1400.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1402.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1414.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1464.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1466.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1469.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1498.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1500.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1522.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1526.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1552.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1554.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1568.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1574.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1577.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1589.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1597.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1601.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1613.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1625.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1631.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1665.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1667.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1678.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1689.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1695.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1704.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1737.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1742.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1746.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1747.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1764.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1779.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1785.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1786.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1795.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1799.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1819.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1825.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1829.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1831.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1837.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1848.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1851.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1852.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1877.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1880.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1883.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1884.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1890.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1891.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1897.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1907.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1909.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1918.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1921.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1924.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1943.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1979.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1986.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1992.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst1999.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2009.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2016.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2019.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2026.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2030.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2054.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2067.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2083.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2091.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2108.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2112.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2120.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2137.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2142.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2160.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2166.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2171.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2175.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2176.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2181.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2184.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2186.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2207.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2209.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2217.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2224.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2229.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2248.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2250.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2261.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2264.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2271.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2272.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2281.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2283.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2292.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2294.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2296.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2299.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2311.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2318.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2328.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2339.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2341.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2352.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2356.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2358.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2362.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2371.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2378.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2379.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2380.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2392.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2410.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2412.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2418.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2422.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2426.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2440.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2444.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2457.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2466.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2467.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2468.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2472.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2474.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2481.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2507.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2508.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2511.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2529.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2530.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2562.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2563.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2578.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2591.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2592.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2602.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2612.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2615.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2620.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2623.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2625.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2677.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2678.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2686.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2688.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2701.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2720.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2748.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2752.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2762.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2763.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2801.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2807.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2827.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2828.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2830.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2831.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2836.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2841.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2846.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2851.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2854.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2863.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2883.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2884.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2885.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2889.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2901.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2916.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2918.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2929.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2937.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2939.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2940.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2949.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2964.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2967.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2974.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst2985.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3010.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3016.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3018.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3021.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3058.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3061.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3062.xdti_16f_9t_96_mux21 72.22 100.00 16.67 100.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3070.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3086.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3088.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3093.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3102.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3108.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3118.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3135.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3150.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3152.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3155.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3158.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3172.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3178.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3180.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3185.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3211.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3241.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3246.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3251.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3271.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3280.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3288.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3302.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3310.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3312.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3354.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3356.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3361.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3366.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3369.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3371.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3412.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3426.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3432.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3433.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3438.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3443.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3450.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3452.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3471.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3472.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3495.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3496.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3522.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3526.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3530.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3538.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3548.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3551.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3558.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3562.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3578.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3591.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3612.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3626.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3640.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3643.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3652.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3653.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3659.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3662.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3666.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3672.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3673.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3697.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3699.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3721.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3722.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3729.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3730.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3731.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3732.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3734.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3738.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3762.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3772.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3785.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3786.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3793.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3800.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3820.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3822.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3825.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3827.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3838.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3848.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3850.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3859.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3861.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3884.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3896.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3897.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3905.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3906.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3917.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3921.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3922.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3926.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3974.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3984.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3995.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3996.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst3999.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4005.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4029.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4037.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4042.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4043.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4045.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4061.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4069.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4077.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4079.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4093.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4128.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4132.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4136.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4140.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4151.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4164.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4173.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4184.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4190.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4207.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4209.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4223.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4224.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4234.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4235.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4240.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4257.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4282.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4286.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4304.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4306.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4337.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4338.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4339.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4344.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4346.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4350.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4355.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4356.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4367.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4373.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4377.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4379.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4392.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4403.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4405.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4411.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4430.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4431.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4453.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4468.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4473.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4477.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4499.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4546.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4552.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4562.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4567.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4569.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4588.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4589.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4590.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4611.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4624.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4639.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4670.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4693.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4700.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4701.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4707.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4710.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4730.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4736.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4744.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4746.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4751.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4758.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4765.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4789.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4793.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4796.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4800.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4825.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4843.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4845.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4847.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4848.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4853.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4857.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4864.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4881.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4883.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4896.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4923.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4933.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4961.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4966.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4981.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4987.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4997.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst4998.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5012.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5014.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5026.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5030.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5032.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5036.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5037.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5046.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5066.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5074.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5078.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5085.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5086.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5094.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5100.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5106.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5122.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5131.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5132.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5138.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5144.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5156.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5160.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5162.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5169.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5177.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5180.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5190.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5197.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5205.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5208.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5227.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5228.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5232.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5233.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5235.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5274.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5275.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5300.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5315.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5325.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5335.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5347.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5349.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5364.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5368.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5369.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5372.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5385.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5391.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5393.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5417.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5422.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5425.xdti_16f_9t_96_mux21 72.22 100.00 16.67 100.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5452.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5480.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5486.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5491.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5500.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5507.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5515.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5520.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5538.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5540.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5557.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5559.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5570.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5582.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5583.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5592.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5598.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5612.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5627.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5632.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5643.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5663.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5664.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5667.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5681.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5685.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5686.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5693.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5725.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5731.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5734.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5743.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5763.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5768.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5774.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5779.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5786.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5790.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5796.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5809.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5828.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5834.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5838.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5839.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5843.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5849.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5852.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5853.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5863.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5875.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5877.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5878.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5887.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5909.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5913.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5916.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5918.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5931.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5943.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5964.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5970.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5975.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5979.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5985.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5988.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5990.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst5997.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6007.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6042.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6044.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6047.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6048.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6051.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6072.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6075.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6077.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6080.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6105.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6113.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6117.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6143.xdti_16f_9t_96_mux21 72.22 100.00 16.67 100.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6148.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6153.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6158.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6166.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6174.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6179.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6207.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6214.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6232.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6269.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6271.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6272.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6286.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6303.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6307.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6313.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6329.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6332.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6382.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6389.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6404.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6411.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6418.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6431.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6448.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6451.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6453.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6459.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6476.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6477.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6480.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6489.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6493.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6497.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6498.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6533.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6549.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6558.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6567.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6592.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6594.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6595.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6599.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6614.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6616.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6623.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6624.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6626.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6630.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6645.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6653.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6656.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6675.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6692.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6698.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6707.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6709.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6711.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6713.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6714.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6731.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6747.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6765.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6770.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6771.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6772.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6773.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6774.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6784.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6786.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6798.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6824.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6825.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6826.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6828.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6834.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6836.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6848.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6857.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6865.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6867.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6878.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6880.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6886.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6894.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6898.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6899.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6907.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6920.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6929.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6932.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6943.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6944.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6963.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6977.xdti_16f_9t_96_mux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst6978.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7009.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7013.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7026.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7032.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7050.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7051.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7058.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7074.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7086.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7088.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7104.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7113.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7117.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7121.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7128.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7130.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7133.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7134.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7148.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7153.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7161.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7162.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7189.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7193.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7200.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7210.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7214.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7224.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7227.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7228.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7240.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7250.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7261.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7262.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7272.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7274.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7277.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7281.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7293.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7297.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7311.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7316.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7320.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7333.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7341.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7342.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7343.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7345.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7348.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7383.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7400.xdti_16f_9t_96_mux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7417.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7420.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7436.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7444.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7447.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7477.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7487.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7493.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7494.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7503.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7513.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7515.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7525.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7527.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7532.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7567.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7583.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7619.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7622.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7635.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7636.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7637.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7639.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7642.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7649.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7657.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7682.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7699.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7704.xdti_16f_9t_96_mux21 72.22 100.00 16.67 100.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7708.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7713.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7715.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7717.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7725.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7728.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7738.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7756.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7766.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7789.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7795.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7813.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7815.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7817.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7843.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7865.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7878.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7880.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7890.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7913.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7917.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7920.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7930.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7932.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7940.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7942.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7954.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7957.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7959.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7960.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7965.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7966.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7972.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7984.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst7993.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8003.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8005.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8016.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8017.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8019.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8021.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8022.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8033.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8035.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8042.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8046.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8085.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8091.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8114.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8146.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8148.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8149.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8163.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8181.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8194.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8207.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8219.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8241.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8247.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8274.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8277.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8285.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8288.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8290.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8302.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8306.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8320.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8321.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8323.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8325.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8330.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8349.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8358.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8367.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8373.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8374.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8377.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8383.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8403.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8420.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8443.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8452.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8472.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8475.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8478.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8483.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8493.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8512.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8518.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8524.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8531.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8541.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8543.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8545.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8550.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8563.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8565.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8574.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8576.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8589.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8595.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8613.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8616.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8625.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8626.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8647.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8648.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8650.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8651.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8653.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8654.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8685.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8691.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8696.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8701.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8716.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8724.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8732.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8735.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8745.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8748.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8749.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8752.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8754.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8755.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8769.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8791.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8809.xdti_16f_9t_96_mux21 72.22 100.00 16.67 100.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8810.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8840.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8849.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8850.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8855.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8856.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8864.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8871.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8873.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8907.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8919.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8923.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8925.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8928.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8930.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8941.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8943.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8948.xdti_16f_9t_96_mux21 72.22 100.00 16.67 100.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8953.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8961.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8962.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8976.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst8997.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9006.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9008.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9018.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9023.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9032.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9033.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9037.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9040.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9050.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9078.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9104.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9105.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9106.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9107.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9121.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9128.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9138.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9141.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9145.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9146.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9157.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9164.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9170.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9192.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9206.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9211.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9218.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9221.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9228.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9231.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9236.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9246.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9255.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9273.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9296.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9312.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9323.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9325.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9327.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9334.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9336.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9339.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9344.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9347.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9354.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9368.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9378.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9389.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9408.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9417.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9452.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9457.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9470.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9474.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9475.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9482.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9500.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9502.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9525.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9532.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9533.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9557.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9572.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9586.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9587.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9588.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9590.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9593.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9602.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9635.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9648.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9657.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9659.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9660.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9666.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9675.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9684.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9714.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9721.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9733.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9744.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9759.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9772.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9778.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9786.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9790.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9793.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9815.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9816.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9820.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9828.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9838.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9855.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9866.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9869.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9873.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9882.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9883.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9894.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9898.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9929.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9933.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9937.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9940.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9959.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9967.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9970.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9971.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9978.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9987.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9990.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9992.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9993.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst9994.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10003.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10007.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10015.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10018.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10021.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10024.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10028.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10043.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10054.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10061.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10062.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10074.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10076.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10100.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10108.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10112.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10113.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10115.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10118.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10135.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10151.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10163.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10168.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10211.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10221.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10232.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10235.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10238.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10246.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10249.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10258.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10282.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10283.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10284.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10289.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10294.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10295.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10296.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10309.xdti_16f_9t_96_ckmux21.xmux21 36.11 50.00 8.33 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10347.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10355.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10361.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10385.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10412.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10437.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10442.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10447.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10448.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10467.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10468.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10470.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10473.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10485.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10505.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10507.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10520.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10539.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10543.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10545.xdti_16f_9t_96_mux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10554.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10563.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10568.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10575.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10581.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10582.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10586.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10589.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10614.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10619.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10628.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10629.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10635.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10655.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10660.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10664.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10676.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10677.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10688.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10717.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10739.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10744.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10749.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10761.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10764.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10771.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10782.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10792.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10797.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10801.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10810.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10815.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10820.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10835.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10842.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10848.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10849.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10851.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10875.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10879.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10887.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10898.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10900.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10914.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10927.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10935.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10942.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10965.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10966.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst10983.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11001.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11026.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11038.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11039.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11040.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11048.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11049.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11057.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11081.xdti_16f_9t_96_mux21 72.22 100.00 16.67 100.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11103.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11113.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11117.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11128.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11139.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11144.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11153.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11167.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11192.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11193.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11194.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11207.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11216.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11222.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11226.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11231.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11234.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11241.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11243.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11250.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11259.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11261.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11273.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11294.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11314.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11315.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11320.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11327.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11333.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11335.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11340.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11347.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11351.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11354.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11364.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11366.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11368.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11377.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11379.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11381.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11388.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11398.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11399.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11401.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11404.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11410.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11412.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11431.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11456.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11458.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11463.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11469.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11470.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11477.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11487.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11499.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11503.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11508.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11510.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11520.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11521.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11524.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11533.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11567.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11568.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11575.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11578.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11579.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11588.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11591.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11601.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11610.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11619.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11628.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11629.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11633.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11637.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11640.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11661.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11667.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11682.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11690.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11696.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11701.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11708.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11717.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11730.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11770.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11797.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11818.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11824.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11850.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11860.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11880.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11886.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11903.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11910.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11924.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11925.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11926.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11933.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11936.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11948.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11963.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11976.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst11994.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12009.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12024.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12032.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12071.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12075.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12078.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12090.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12097.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12099.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12120.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12122.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12131.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12149.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12165.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12193.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12212.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12217.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12219.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12222.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12236.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12239.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12244.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12253.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12255.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12263.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12266.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12273.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12275.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12276.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12291.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12302.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12316.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12324.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12332.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12347.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12360.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12381.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12390.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12416.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12418.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12421.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12426.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12431.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12435.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12452.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12466.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12478.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12482.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12505.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12519.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12523.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12524.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12541.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12561.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12562.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12566.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12578.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12580.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12582.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12592.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12594.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12599.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12602.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12613.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12620.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12639.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12646.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12680.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12681.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12686.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12712.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12723.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12724.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12726.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12731.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12735.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12749.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12752.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12756.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12777.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12787.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12791.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12802.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12812.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12827.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12845.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12854.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12866.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12867.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12872.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12894.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12897.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12898.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12902.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12907.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12909.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12910.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12919.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12943.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12944.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12951.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12952.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12960.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12961.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12976.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst12995.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13020.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13022.xdti_16f_9t_96_mux21 72.22 100.00 16.67 100.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13026.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13027.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13036.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13044.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13052.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13058.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13068.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13094.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13106.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13117.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13119.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13121.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13155.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13157.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13164.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13196.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13202.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13207.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13208.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13223.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13224.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13225.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13231.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13245.xdti_16f_9t_96_ckmux21.xmux21 44.44 50.00 33.33 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13246.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13249.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13256.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13270.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13271.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13272.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13275.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13281.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13299.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13301.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13302.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13323.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13343.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13351.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13368.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13375.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13384.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13396.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13415.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13420.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13423.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13432.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13440.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13441.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13452.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13453.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13469.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13491.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13493.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13507.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13510.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13535.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13546.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13548.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13565.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13568.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13577.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13593.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13607.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13616.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13618.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13630.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13634.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13644.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13651.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13656.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13659.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13666.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13670.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13673.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13676.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13679.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13680.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13681.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13690.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13710.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13717.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13728.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13730.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13732.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13738.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13760.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13767.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13769.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13770.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13779.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13782.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13802.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13805.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[0].xinst13815.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst27.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst30.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst31.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst32.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst35.xdti_16f_9t_96_mux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst47.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst68.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst86.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst95.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst96.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst100.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst103.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst104.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst111.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst113.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst117.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst120.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst127.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst131.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst137.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst144.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst145.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst151.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst161.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst162.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst166.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst172.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst180.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst186.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst193.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst197.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst209.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst217.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst218.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst222.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst229.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst231.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst234.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst240.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst256.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst266.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst267.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst270.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst283.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst311.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst315.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst322.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst330.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst333.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst338.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst351.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst355.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst357.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst372.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst378.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst413.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst417.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst424.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst441.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst442.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst459.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst469.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst491.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst494.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst497.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst504.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst507.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst520.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst531.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst538.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst544.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst560.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst571.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst580.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst587.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst592.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst603.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst612.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst623.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst626.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst629.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst635.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst643.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst661.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst673.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst677.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst681.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst687.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst691.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst723.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst724.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst730.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst740.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst747.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst755.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst757.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst763.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst787.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst803.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst806.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst809.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst812.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst828.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst849.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst850.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst858.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst867.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst869.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst871.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst876.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst883.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst891.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst899.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst907.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst908.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst912.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst914.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst915.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst919.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst927.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst969.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst971.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst984.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1005.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1018.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1019.xdti_16f_9t_96_mux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1023.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1028.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1036.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1056.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1061.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1062.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1066.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1067.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1068.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1069.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1084.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1092.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1093.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1094.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1097.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1116.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1119.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1129.xdti_16f_9t_96_mux21 72.22 100.00 16.67 100.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1131.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1142.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1156.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1205.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1208.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1220.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1245.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1246.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1265.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1278.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1291.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1292.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1301.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1337.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1338.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1341.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1342.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1347.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1358.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1368.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1378.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1381.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1384.xdti_16f_9t_96_mux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1391.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1395.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1397.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1400.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1402.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1414.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1464.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1466.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1469.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1498.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1500.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1522.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1526.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1552.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1554.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1568.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1574.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1577.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1589.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1597.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1601.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1613.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1625.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1631.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1665.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1667.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1678.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1689.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1695.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1704.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1737.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1742.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1746.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1747.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1764.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1779.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1785.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1786.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1795.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1799.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1819.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1825.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1829.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1831.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1837.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1848.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1851.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1852.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1877.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1880.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1883.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1884.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1890.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1891.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1897.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1907.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1909.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1918.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1921.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1924.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1943.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1979.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1986.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1992.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst1999.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2009.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2016.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2019.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2026.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2030.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2054.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2067.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2083.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2091.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2108.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2112.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2120.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2137.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2142.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2160.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2166.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2171.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2175.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2176.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2181.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2184.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2186.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2207.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2209.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2217.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2224.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2229.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2248.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2250.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2261.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2264.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2271.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2272.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2281.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2283.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2292.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2294.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2296.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2299.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2311.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2318.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2328.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2339.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2341.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2352.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2356.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2358.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2362.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2371.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2378.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2379.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2380.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2392.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2410.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2412.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2418.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2422.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2426.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2440.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2444.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2457.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2466.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2467.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2468.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2472.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2474.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2481.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2507.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2508.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2511.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2529.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2530.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2562.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2563.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2578.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2591.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2592.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2602.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2612.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2615.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2620.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2623.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2625.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2677.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2678.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2686.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2688.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2701.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2720.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2748.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2752.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2762.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2763.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2801.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2807.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2827.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2828.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2830.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2831.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2836.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2841.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2846.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2851.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2854.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2863.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2883.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2884.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2885.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2889.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2901.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2916.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2918.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2929.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2937.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2939.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2940.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2949.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2964.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2967.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2974.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst2985.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3010.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3016.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3018.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3021.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3058.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3061.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3062.xdti_16f_9t_96_mux21 72.22 100.00 16.67 100.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3070.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3086.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3088.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3093.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3102.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3108.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3118.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3135.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3150.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3152.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3155.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3158.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3172.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3178.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3180.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3185.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3211.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3241.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3246.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3251.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3271.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3280.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3288.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3302.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3310.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3312.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3354.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3356.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3361.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3366.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3369.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3371.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3412.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3426.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3432.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3433.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3438.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3443.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3450.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3452.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3471.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3472.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3495.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3496.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3522.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3526.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3530.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3538.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3548.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3551.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3558.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3562.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3578.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3591.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3612.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3626.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3640.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3643.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3652.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3653.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3659.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3662.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3666.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3672.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3673.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3697.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3699.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3721.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3722.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3729.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3730.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3731.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3732.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3734.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3738.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3762.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3772.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3785.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3786.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3793.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3800.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3820.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3822.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3825.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3827.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3838.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3848.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3850.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3859.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3861.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3884.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3896.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3897.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3905.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3906.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3917.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3921.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3922.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3926.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3974.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3984.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3995.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3996.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst3999.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4005.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4029.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4037.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4042.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4043.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4045.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4061.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4069.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4077.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4079.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4093.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4128.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4132.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4136.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4140.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4151.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4164.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4173.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4184.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4190.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4207.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4209.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4223.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4224.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4234.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4235.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4240.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4257.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4282.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4286.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4304.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4306.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4337.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4338.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4339.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4344.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4346.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4350.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4355.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4356.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4367.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4373.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4377.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4379.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4392.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4403.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4405.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4411.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4430.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4431.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4453.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4468.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4473.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4477.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4499.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4546.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4552.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4562.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4567.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4569.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4588.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4589.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4590.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4611.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4624.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4639.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4670.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4693.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4700.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4701.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4707.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4710.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4730.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4736.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4744.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4746.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4751.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4758.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4765.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4789.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4793.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4796.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4800.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4825.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4843.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4845.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4847.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4848.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4853.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4857.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4864.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4881.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4883.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4896.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4923.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4933.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4961.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4966.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4981.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4987.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4997.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst4998.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5012.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5014.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5026.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5030.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5032.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5036.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5037.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5046.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5066.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5074.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5078.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5085.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5086.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5094.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5100.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5106.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5122.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5131.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5132.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5138.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5144.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5156.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5160.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5162.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5169.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5177.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5180.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5190.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5197.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5205.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5208.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5227.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5228.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5232.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5233.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5235.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5274.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5275.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5300.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5315.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5325.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5335.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5347.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5349.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5364.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5368.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5369.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5372.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5385.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5391.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5393.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5417.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5422.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5425.xdti_16f_9t_96_mux21 72.22 100.00 16.67 100.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5452.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5480.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5486.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5491.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5500.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5507.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5515.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5520.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5538.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5540.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5557.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5559.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5570.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5582.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5583.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5592.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5598.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5612.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5627.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5632.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5643.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5663.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5664.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5667.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5681.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5685.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5686.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5693.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5725.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5731.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5734.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5743.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5763.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5768.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5774.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5779.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5786.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5790.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5796.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5809.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5828.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5834.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5838.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5839.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5843.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5849.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5852.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5853.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5863.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5875.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5877.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5878.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5887.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5909.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5913.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5916.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5918.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5931.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5943.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5964.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5970.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5975.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5979.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5985.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5988.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5990.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst5997.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6007.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6042.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6044.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6047.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6048.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6051.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6072.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6075.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6077.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6080.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6105.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6113.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6117.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6143.xdti_16f_9t_96_mux21 72.22 100.00 16.67 100.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6148.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6153.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6158.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6166.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6174.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6179.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6207.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6214.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6232.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6269.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6271.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6272.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6286.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6303.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6307.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6313.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6329.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6332.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6382.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6389.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6404.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6411.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6418.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6431.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6448.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6451.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6453.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6459.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6476.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6477.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6480.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6489.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6493.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6497.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6498.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6533.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6549.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6558.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6567.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6592.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6594.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6595.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6599.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6614.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6616.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6623.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6624.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6626.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6630.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6645.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6653.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6656.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6675.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6692.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6698.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6707.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6709.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6711.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6713.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6714.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6731.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6747.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6765.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6770.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6771.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6772.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6773.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6774.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6784.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6786.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6798.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6824.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6825.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6826.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6828.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6834.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6836.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6848.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6857.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6865.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6867.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6878.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6880.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6886.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6894.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6898.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6899.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6907.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6920.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6929.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6932.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6943.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6944.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6963.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6977.xdti_16f_9t_96_mux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst6978.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7009.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7013.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7026.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7032.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7050.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7051.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7058.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7074.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7086.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7088.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7104.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7113.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7117.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7121.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7128.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7130.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7133.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7134.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7148.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7153.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7161.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7162.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7189.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7193.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7200.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7210.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7214.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7224.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7227.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7228.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7240.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7250.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7261.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7262.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7272.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7274.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7277.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7281.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7293.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7297.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7311.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7316.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7320.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7333.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7341.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7342.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7343.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7345.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7348.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7383.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7400.xdti_16f_9t_96_mux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7417.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7420.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7436.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7444.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7447.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7477.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7487.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7493.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7494.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7503.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7513.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7515.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7525.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7527.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7532.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7567.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7583.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7619.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7622.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7635.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7636.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7637.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7639.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7642.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7649.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7657.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7682.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7699.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7704.xdti_16f_9t_96_mux21 72.22 100.00 16.67 100.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7708.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7713.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7715.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7717.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7725.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7728.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7738.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7756.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7766.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7789.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7795.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7813.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7815.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7817.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7843.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7865.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7878.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7880.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7890.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7913.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7917.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7920.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7930.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7932.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7940.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7942.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7954.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7957.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7959.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7960.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7965.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7966.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7972.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7984.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst7993.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8003.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8005.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8016.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8017.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8019.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8021.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8022.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8033.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8035.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8042.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8046.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8085.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8091.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8114.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8146.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8148.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8149.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8163.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8181.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8194.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8207.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8219.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8241.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8247.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8274.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8277.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8285.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8288.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8290.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8302.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8306.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8320.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8321.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8323.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8325.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8330.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8349.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8358.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8367.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8373.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8374.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8377.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8383.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8403.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8420.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8443.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8452.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8472.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8475.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8478.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8483.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8493.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8512.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8518.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8524.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8531.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8541.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8543.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8545.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8550.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8563.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8565.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8574.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8576.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8589.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8595.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8613.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8616.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8625.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8626.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8647.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8648.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8650.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8651.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8653.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8654.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8685.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8691.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8696.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8701.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8716.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8724.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8732.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8735.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8745.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8748.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8749.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8752.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8754.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8755.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8769.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8791.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8809.xdti_16f_9t_96_mux21 72.22 100.00 16.67 100.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8810.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8840.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8849.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8850.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8855.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8856.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8864.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8871.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8873.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8907.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8919.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8923.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8925.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8928.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8930.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8941.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8943.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8948.xdti_16f_9t_96_mux21 72.22 100.00 16.67 100.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8953.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8961.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8962.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8976.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst8997.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9006.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9008.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9018.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9023.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9032.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9033.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9037.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9040.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9050.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9078.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9104.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9105.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9106.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9107.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9121.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9128.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9138.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9141.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9145.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9146.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9157.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9164.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9170.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9192.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9206.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9211.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9218.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9221.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9228.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9231.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9236.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9246.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9255.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9273.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9296.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9312.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9323.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9325.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9327.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9334.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9336.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9339.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9344.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9347.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9354.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9368.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9378.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9389.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9408.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9417.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9452.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9457.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9470.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9474.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9475.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9482.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9500.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9502.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9525.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9532.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9533.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9557.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9572.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9586.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9587.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9588.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9590.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9593.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9602.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9635.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9648.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9657.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9659.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9660.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9666.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9675.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9684.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9714.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9721.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9733.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9744.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9759.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9772.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9778.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9786.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9790.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9793.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9815.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9816.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9820.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9828.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9838.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9855.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9866.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9869.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9873.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9882.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9883.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9894.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9898.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9929.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9933.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9937.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9940.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9959.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9967.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9970.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9971.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9978.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9987.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9990.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9992.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9993.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst9994.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10003.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10007.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10015.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10018.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10021.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10024.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10028.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10043.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10054.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10061.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10062.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10074.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10076.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10100.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10108.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10112.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10113.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10115.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10118.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10135.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10151.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10163.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10168.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10211.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10221.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10232.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10235.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10238.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10246.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10249.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10258.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10282.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10283.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10284.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10289.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10294.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10295.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10296.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10309.xdti_16f_9t_96_ckmux21.xmux21 36.11 50.00 8.33 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10347.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10355.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10361.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10385.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10412.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10437.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10442.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10447.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10448.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10467.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10468.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10470.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10473.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10485.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10505.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10507.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10520.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10539.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10543.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10545.xdti_16f_9t_96_mux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10554.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10563.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10568.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10575.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10581.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10582.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10586.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10589.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10614.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10619.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10628.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10629.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10635.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10655.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10660.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10664.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10676.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10677.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10688.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10717.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10739.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10744.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10749.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10761.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10764.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10771.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10782.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10792.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10797.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10801.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10810.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10815.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10820.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10835.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10842.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10848.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10849.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10851.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10875.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10879.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10887.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10898.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10900.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10914.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10927.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10935.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10942.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10965.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10966.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst10983.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11001.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11026.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11038.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11039.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11040.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11048.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11049.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11057.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11081.xdti_16f_9t_96_mux21 72.22 100.00 16.67 100.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11103.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11113.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11117.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11128.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11139.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11144.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11153.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11167.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11192.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11193.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11194.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11207.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11216.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11222.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11226.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11231.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11234.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11241.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11243.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11250.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11259.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11261.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11273.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11294.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11314.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11315.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11320.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11327.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11333.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11335.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11340.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11347.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11351.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11354.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11364.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11366.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11368.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11377.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11379.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11381.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11388.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11398.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11399.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11401.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11404.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11410.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11412.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11431.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11456.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11458.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11463.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11469.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11470.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11477.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11487.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11499.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11503.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11508.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11510.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11520.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11521.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11524.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11533.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11567.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11568.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11575.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11578.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11579.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11588.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11591.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11601.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11610.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11619.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11628.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11629.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11633.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11637.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11640.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11661.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11667.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11682.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11690.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11696.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11701.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11708.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11717.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11730.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11770.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11797.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11818.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11824.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11850.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11860.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11880.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11886.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11903.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11910.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11924.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11925.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11926.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11933.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11936.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11948.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11963.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11976.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst11994.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12009.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12024.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12032.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12071.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12075.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12078.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12090.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12097.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12099.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12120.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12122.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12131.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12149.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12165.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12193.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12212.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12217.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12219.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12222.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12236.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12239.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12244.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12253.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12255.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12263.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12266.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12273.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12275.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12276.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12291.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12302.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12316.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12324.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12332.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12347.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12360.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12381.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12390.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12416.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12418.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12421.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12426.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12431.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12435.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12452.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12466.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12478.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12482.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12505.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12519.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12523.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12524.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12541.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12561.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12562.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12566.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12578.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12580.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12582.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12592.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12594.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12599.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12602.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12613.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12620.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12639.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12646.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12680.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12681.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12686.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12712.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12723.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12724.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12726.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12731.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12735.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12749.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12752.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12756.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12777.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12787.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12791.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12802.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12812.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12827.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12845.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12854.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12866.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12867.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12872.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12894.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12897.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12898.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12902.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12907.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12909.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12910.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12919.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12943.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12944.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12951.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12952.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12960.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12961.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12976.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst12995.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13020.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13022.xdti_16f_9t_96_mux21 72.22 100.00 16.67 100.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13026.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13027.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13036.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13044.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13052.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13058.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13068.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13094.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13106.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13117.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13119.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13121.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13155.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13157.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13164.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13196.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13202.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13207.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13208.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13223.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13224.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13225.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13231.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13245.xdti_16f_9t_96_ckmux21.xmux21 44.44 50.00 33.33 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13246.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13249.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13256.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13270.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13271.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13272.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13275.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13281.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13299.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13301.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13302.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13323.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13343.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13351.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13368.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13375.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13384.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13396.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13415.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13420.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13423.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13432.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13440.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13441.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13452.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13453.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13469.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13491.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13493.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13507.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13510.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13535.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13546.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13548.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13565.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13568.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13577.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13593.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13607.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13616.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13618.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13630.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13634.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13644.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13651.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13656.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13659.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13666.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13670.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13673.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13676.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13679.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13680.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13681.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13690.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13710.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13717.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13728.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13730.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13732.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13738.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13760.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13767.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13769.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13770.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13779.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13782.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13802.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13805.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[1].xinst13815.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst27.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst30.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst31.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst32.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst35.xdti_16f_9t_96_mux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst47.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst68.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst86.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst95.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst96.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst100.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst103.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst104.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst111.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst113.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst117.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst120.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst127.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst131.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst137.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst144.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst145.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst151.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst161.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst162.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst166.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst172.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst180.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst186.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst193.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst197.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst209.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst217.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst218.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst222.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst229.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst231.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst234.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst240.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst256.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst266.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst267.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst270.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst283.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst311.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst315.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst322.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst330.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst333.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst338.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst351.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst355.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst357.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst372.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst378.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst413.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst417.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst424.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst441.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst442.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst459.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst469.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst491.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst494.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst497.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst504.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst507.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst520.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst531.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst538.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst544.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst560.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst571.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst580.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst587.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst592.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst603.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst612.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst623.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst626.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst629.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst635.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst643.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst661.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst673.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst677.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst681.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst687.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst691.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst723.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst724.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst730.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst740.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst747.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst755.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst757.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst763.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst787.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst803.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst806.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst809.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst812.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst828.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst849.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst850.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst858.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst867.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst869.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst871.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst876.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst883.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst891.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst899.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst907.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst908.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst912.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst914.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst915.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst919.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst927.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst969.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst971.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst984.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1005.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1018.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1019.xdti_16f_9t_96_mux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1023.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1028.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1036.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1056.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1061.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1062.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1066.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1067.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1068.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1069.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1084.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1092.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1093.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1094.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1097.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1116.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1119.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1129.xdti_16f_9t_96_mux21 72.22 100.00 16.67 100.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1131.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1142.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1156.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1205.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1208.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1220.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1245.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1246.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1265.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1278.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1291.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1292.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1301.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1337.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1338.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1341.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1342.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1347.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1358.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1368.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1378.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1381.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1384.xdti_16f_9t_96_mux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1391.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1395.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1397.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1400.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1402.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1414.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1464.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1466.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1469.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1498.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1500.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1522.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1526.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1552.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1554.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1568.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1574.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1577.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1589.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1597.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1601.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1613.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1625.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1631.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1665.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1667.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1678.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1689.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1695.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1704.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1737.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1742.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1746.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1747.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1764.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1779.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1785.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1786.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1795.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1799.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1819.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1825.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1829.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1831.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1837.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1848.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1851.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1852.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1877.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1880.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1883.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1884.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1890.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1891.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1897.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1907.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1909.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1918.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1921.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1924.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1943.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1979.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1986.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1992.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst1999.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2009.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2016.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2019.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2026.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2030.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2054.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2067.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2083.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2091.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2108.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2112.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2120.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2137.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2142.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2160.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2166.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2171.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2175.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2176.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2181.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2184.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2186.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2207.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2209.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2217.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2224.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2229.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2248.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2250.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2261.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2264.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2271.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2272.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2281.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2283.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2292.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2294.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2296.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2299.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2311.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2318.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2328.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2339.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2341.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2352.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2356.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2358.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2362.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2371.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2378.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2379.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2380.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2392.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2410.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2412.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2418.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2422.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2426.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2440.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2444.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2457.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2466.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2467.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2468.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2472.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2474.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2481.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2507.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2508.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2511.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2529.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2530.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2562.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2563.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2578.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2591.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2592.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2602.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2612.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2615.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2620.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2623.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2625.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2677.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2678.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2686.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2688.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2701.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2720.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2748.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2752.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2762.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2763.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2801.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2807.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2827.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2828.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2830.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2831.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2836.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2841.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2846.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2851.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2854.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2863.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2883.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2884.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2885.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2889.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2901.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2916.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2918.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2929.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2937.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2939.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2940.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2949.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2964.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2967.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2974.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst2985.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3010.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3016.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3018.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3021.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3058.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3061.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3062.xdti_16f_9t_96_mux21 72.22 100.00 16.67 100.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3070.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3086.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3088.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3093.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3102.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3108.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3118.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3135.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3150.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3152.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3155.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3158.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3172.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3178.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3180.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3185.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3211.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3241.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3246.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3251.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3271.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3280.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3288.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3302.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3310.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3312.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3354.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3356.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3361.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3366.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3369.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3371.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3412.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3426.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3432.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3433.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3438.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3443.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3450.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3452.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3471.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3472.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3495.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3496.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3522.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3526.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3530.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3538.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3548.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3551.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3558.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3562.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3578.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3591.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3612.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3626.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3640.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3643.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3652.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3653.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3659.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3662.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3666.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3672.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3673.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3697.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3699.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3721.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3722.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3729.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3730.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3731.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3732.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3734.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3738.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3762.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3772.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3785.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3786.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3793.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3800.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3820.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3822.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3825.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3827.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3838.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3848.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3850.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3859.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3861.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3884.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3896.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3897.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3905.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3906.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3917.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3921.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3922.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3926.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3974.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3984.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3995.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3996.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst3999.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4005.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4029.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4037.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4042.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4043.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4045.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4061.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4069.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4077.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4079.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4093.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4128.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4132.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4136.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4140.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4151.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4164.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4173.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4184.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4190.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4207.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4209.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4223.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4224.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4234.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4235.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4240.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4257.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4282.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4286.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4304.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4306.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4337.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4338.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4339.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4344.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4346.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4350.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4355.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4356.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4367.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4373.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4377.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4379.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4392.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4403.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4405.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4411.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4430.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4431.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4453.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4468.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4473.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4477.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4499.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4546.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4552.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4562.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4567.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4569.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4588.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4589.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4590.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4611.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4624.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4639.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4670.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4693.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4700.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4701.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4707.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4710.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4730.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4736.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4744.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4746.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4751.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4758.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4765.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4789.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4793.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4796.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4800.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4825.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4843.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4845.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4847.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4848.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4853.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4857.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4864.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4881.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4883.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4896.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4923.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4933.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4961.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4966.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4981.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4987.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4997.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst4998.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5012.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5014.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5026.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5030.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5032.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5036.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5037.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5046.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5066.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5074.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5078.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5085.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5086.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5094.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5100.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5106.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5122.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5131.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5132.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5138.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5144.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5156.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5160.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5162.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5169.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5177.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5180.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5190.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5197.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5205.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5208.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5227.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5228.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5232.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5233.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5235.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5274.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5275.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5300.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5315.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5325.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5335.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5347.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5349.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5364.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5368.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5369.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5372.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5385.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5391.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5393.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5417.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5422.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5425.xdti_16f_9t_96_mux21 72.22 100.00 16.67 100.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5452.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5480.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5486.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5491.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5500.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5507.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5515.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5520.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5538.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5540.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5557.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5559.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5570.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5582.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5583.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5592.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5598.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5612.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5627.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5632.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5643.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5663.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5664.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5667.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5681.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5685.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5686.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5693.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5725.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5731.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5734.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5743.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5763.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5768.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5774.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5779.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5786.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5790.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5796.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5809.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5828.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5834.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5838.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5839.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5843.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5849.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5852.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5853.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5863.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5875.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5877.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5878.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5887.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5909.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5913.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5916.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5918.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5931.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5943.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5964.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5970.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5975.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5979.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5985.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5988.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5990.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst5997.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6007.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6042.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6044.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6047.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6048.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6051.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6072.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6075.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6077.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6080.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6105.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6113.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6117.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6143.xdti_16f_9t_96_mux21 72.22 100.00 16.67 100.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6148.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6153.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6158.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6166.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6174.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6179.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6207.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6214.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6232.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6269.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6271.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6272.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6286.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6303.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6307.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6313.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6329.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6332.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6382.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6389.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6404.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6411.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6418.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6431.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6448.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6451.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6453.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6459.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6476.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6477.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6480.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6489.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6493.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6497.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6498.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6533.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6549.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6558.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6567.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6592.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6594.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6595.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6599.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6614.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6616.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6623.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6624.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6626.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6630.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6645.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6653.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6656.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6675.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6692.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6698.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6707.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6709.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6711.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6713.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6714.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6731.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6747.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6765.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6770.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6771.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6772.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6773.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6774.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6784.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6786.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6798.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6824.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6825.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6826.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6828.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6834.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6836.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6848.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6857.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6865.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6867.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6878.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6880.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6886.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6894.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6898.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6899.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6907.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6920.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6929.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6932.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6943.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6944.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6963.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6977.xdti_16f_9t_96_mux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst6978.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7009.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7013.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7026.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7032.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7050.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7051.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7058.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7074.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7086.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7088.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7104.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7113.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7117.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7121.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7128.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7130.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7133.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7134.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7148.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7153.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7161.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7162.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7189.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7193.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7200.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7210.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7214.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7224.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7227.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7228.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7240.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7250.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7261.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7262.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7272.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7274.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7277.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7281.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7293.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7297.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7311.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7316.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7320.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7333.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7341.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7342.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7343.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7345.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7348.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7383.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7400.xdti_16f_9t_96_mux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7417.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7420.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7436.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7444.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7447.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7477.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7487.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7493.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7494.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7503.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7513.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7515.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7525.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7527.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7532.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7567.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7583.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7619.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7622.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7635.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7636.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7637.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7639.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7642.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7649.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7657.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7682.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7699.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7704.xdti_16f_9t_96_mux21 72.22 100.00 16.67 100.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7708.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7713.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7715.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7717.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7725.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7728.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7738.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7756.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7766.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7789.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7795.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7813.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7815.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7817.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7843.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7865.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7878.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7880.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7890.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7913.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7917.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7920.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7930.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7932.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7940.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7942.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7954.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7957.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7959.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7960.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7965.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7966.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7972.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7984.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst7993.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8003.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8005.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8016.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8017.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8019.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8021.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8022.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8033.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8035.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8042.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8046.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8085.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8091.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8114.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8146.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8148.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8149.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8163.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8181.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8194.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8207.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8219.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8241.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8247.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8274.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8277.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8285.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8288.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8290.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8302.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8306.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8320.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8321.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8323.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8325.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8330.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8349.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8358.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8367.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8373.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8374.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8377.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8383.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8403.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8420.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8443.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8452.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8472.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8475.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8478.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8483.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8493.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8512.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8518.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8524.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8531.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8541.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8543.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8545.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8550.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8563.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8565.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8574.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8576.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8589.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8595.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8613.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8616.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8625.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8626.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8647.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8648.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8650.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8651.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8653.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8654.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8685.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8691.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8696.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8701.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8716.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8724.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8732.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8735.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8745.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8748.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8749.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8752.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8754.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8755.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8769.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8791.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8809.xdti_16f_9t_96_mux21 72.22 100.00 16.67 100.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8810.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8840.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8849.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8850.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8855.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8856.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8864.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8871.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8873.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8907.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8919.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8923.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8925.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8928.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8930.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8941.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8943.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8948.xdti_16f_9t_96_mux21 72.22 100.00 16.67 100.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8953.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8961.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8962.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8976.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst8997.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9006.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9008.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9018.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9023.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9032.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9033.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9037.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9040.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9050.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9078.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9104.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9105.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9106.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9107.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9121.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9128.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9138.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9141.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9145.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9146.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9157.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9164.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9170.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9192.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9206.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9211.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9218.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9221.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9228.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9231.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9236.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9246.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9255.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9273.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9296.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9312.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9323.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9325.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9327.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9334.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9336.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9339.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9344.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9347.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9354.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9368.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9378.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9389.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9408.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9417.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9452.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9457.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9470.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9474.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9475.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9482.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9500.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9502.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9525.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9532.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9533.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9557.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9572.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9586.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9587.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9588.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9590.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9593.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9602.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9635.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9648.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9657.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9659.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9660.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9666.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9675.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9684.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9714.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9721.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9733.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9744.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9759.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9772.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9778.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9786.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9790.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9793.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9815.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9816.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9820.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9828.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9838.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9855.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9866.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9869.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9873.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9882.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9883.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9894.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9898.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9929.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9933.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9937.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9940.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9959.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9967.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9970.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9971.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9978.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9987.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9990.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9992.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9993.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst9994.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10003.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10007.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10015.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10018.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10021.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10024.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10028.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10043.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10054.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10061.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10062.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10074.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10076.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10100.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10108.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10112.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10113.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10115.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10118.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10135.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10151.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10163.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10168.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10211.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10221.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10232.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10235.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10238.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10246.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10249.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10258.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10282.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10283.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10284.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10289.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10294.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10295.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10296.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10309.xdti_16f_9t_96_ckmux21.xmux21 36.11 50.00 8.33 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10347.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10355.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10361.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10385.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10412.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10437.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10442.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10447.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10448.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10467.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10468.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10470.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10473.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10485.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10505.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10507.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10520.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10539.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10543.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10545.xdti_16f_9t_96_mux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10554.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10563.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10568.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10575.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10581.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10582.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10586.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10589.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10614.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10619.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10628.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10629.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10635.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10655.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10660.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10664.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10676.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10677.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10688.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10717.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10739.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10744.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10749.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10761.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10764.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10771.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10782.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10792.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10797.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10801.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10810.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10815.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10820.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10835.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10842.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10848.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10849.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10851.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10875.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10879.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10887.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10898.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10900.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10914.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10927.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10935.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10942.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10965.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10966.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst10983.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11001.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11026.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11038.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11039.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11040.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11048.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11049.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11057.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11081.xdti_16f_9t_96_mux21 72.22 100.00 16.67 100.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11103.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11113.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11117.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11128.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11139.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11144.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11153.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11167.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11192.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11193.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11194.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11207.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11216.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11222.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11226.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11231.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11234.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11241.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11243.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11250.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11259.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11261.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11273.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11294.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11314.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11315.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11320.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11327.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11333.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11335.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11340.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11347.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11351.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11354.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11364.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11366.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11368.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11377.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11379.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11381.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11388.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11398.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11399.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11401.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11404.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11410.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11412.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11431.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11456.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11458.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11463.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11469.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11470.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11477.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11487.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11499.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11503.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11508.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11510.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11520.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11521.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11524.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11533.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11567.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11568.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11575.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11578.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11579.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11588.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11591.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11601.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11610.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11619.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11628.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11629.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11633.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11637.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11640.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11661.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11667.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11682.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11690.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11696.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11701.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11708.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11717.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11730.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11770.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11797.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11818.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11824.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11850.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11860.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11880.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11886.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11903.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11910.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11924.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11925.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11926.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11933.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11936.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11948.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11963.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11976.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst11994.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12009.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12024.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12032.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12071.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12075.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12078.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12090.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12097.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12099.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12120.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12122.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12131.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12149.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12165.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12193.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12212.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12217.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12219.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12222.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12236.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12239.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12244.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12253.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12255.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12263.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12266.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12273.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12275.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12276.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12291.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12302.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12316.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12324.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12332.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12347.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12360.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12381.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12390.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12416.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12418.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12421.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12426.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12431.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12435.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12452.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12466.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12478.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12482.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12505.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12519.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12523.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12524.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12541.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12561.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12562.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12566.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12578.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12580.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12582.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12592.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12594.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12599.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12602.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12613.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12620.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12639.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12646.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12680.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12681.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12686.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12712.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12723.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12724.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12726.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12731.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12735.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12749.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12752.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12756.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12777.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12787.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12791.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12802.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12812.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12827.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12845.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12854.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12866.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12867.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12872.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12894.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12897.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12898.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12902.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12907.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12909.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12910.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12919.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12943.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12944.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12951.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12952.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12960.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12961.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12976.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst12995.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13020.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13022.xdti_16f_9t_96_mux21 72.22 100.00 16.67 100.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13026.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13027.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13036.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13044.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13052.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13058.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13068.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13094.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13106.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13117.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13119.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13121.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13155.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13157.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13164.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13196.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13202.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13207.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13208.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13223.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13224.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13225.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13231.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13245.xdti_16f_9t_96_ckmux21.xmux21 44.44 50.00 33.33 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13246.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13249.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13256.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13270.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13271.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13272.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13275.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13281.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13299.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13301.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13302.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13323.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13343.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13351.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13368.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13375.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13384.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13396.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13415.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13420.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13423.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13432.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13440.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13441.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13452.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13453.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13469.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13491.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13493.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13507.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13510.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13535.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13546.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13548.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13565.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13568.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13577.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13593.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13607.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13616.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13618.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13630.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13634.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13644.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13651.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13656.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13659.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13666.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13670.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13673.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13676.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13679.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13680.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13681.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13690.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13710.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13717.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13728.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13730.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13732.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13738.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13760.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13767.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13769.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13770.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13779.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13782.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13802.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13805.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[2].xinst13815.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst27.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst30.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst31.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst32.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst35.xdti_16f_9t_96_mux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst47.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst68.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst86.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst95.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst96.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst100.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst103.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst104.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst111.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst113.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst117.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst120.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst127.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst131.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst137.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst144.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst145.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst151.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst161.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst162.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst166.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst172.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst180.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst186.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst193.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst197.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst209.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst217.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst218.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst222.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst229.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst231.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst234.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst240.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst256.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst266.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst267.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst270.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst283.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst311.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst315.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst322.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst330.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst333.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst338.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst351.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst355.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst357.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst372.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst378.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst413.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst417.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst424.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst441.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst442.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst459.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst469.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst491.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst494.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst497.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst504.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst507.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst520.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst531.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst538.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst544.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst560.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst571.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst580.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst587.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst592.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst603.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst612.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst623.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst626.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst629.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst635.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst643.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst661.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst673.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst677.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst681.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst687.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst691.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst723.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst724.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst730.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst740.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst747.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst755.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst757.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst763.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst787.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst803.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst806.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst809.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst812.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst828.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst849.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst850.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst858.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst867.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst869.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst871.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst876.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst883.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst891.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst899.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst907.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst908.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst912.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst914.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst915.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst919.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst927.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst969.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst971.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst984.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1005.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1018.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1019.xdti_16f_9t_96_mux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1023.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1028.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1036.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1056.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1061.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1062.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1066.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1067.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1068.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1069.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1084.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1092.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1093.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1094.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1097.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1116.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1119.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1129.xdti_16f_9t_96_mux21 72.22 100.00 16.67 100.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1131.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1142.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1156.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1205.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1208.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1220.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1245.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1246.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1265.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1278.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1291.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1292.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1301.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1337.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1338.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1341.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1342.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1347.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1358.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1368.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1378.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1381.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1384.xdti_16f_9t_96_mux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1391.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1395.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1397.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1400.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1402.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1414.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1464.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1466.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1469.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1498.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1500.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1522.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1526.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1552.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1554.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1568.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1574.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1577.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1589.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1597.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1601.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1613.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1625.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1631.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1665.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1667.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1678.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1689.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1695.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1704.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1737.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1742.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1746.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1747.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1764.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1779.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1785.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1786.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1795.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1799.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1819.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1825.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1829.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1831.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1837.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1848.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1851.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1852.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1877.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1880.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1883.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1884.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1890.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1891.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1897.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1907.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1909.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1918.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1921.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1924.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1943.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1979.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1986.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1992.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst1999.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2009.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2016.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2019.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2026.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2030.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2054.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2067.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2083.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2091.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2108.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2112.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2120.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2137.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2142.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2160.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2166.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2171.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2175.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2176.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2181.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2184.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2186.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2207.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2209.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2217.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2224.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2229.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2248.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2250.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2261.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2264.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2271.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2272.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2281.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2283.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2292.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2294.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2296.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2299.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2311.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2318.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2328.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2339.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2341.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2352.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2356.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2358.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2362.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2371.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2378.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2379.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2380.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2392.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2410.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2412.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2418.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2422.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2426.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2440.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2444.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2457.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2466.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2467.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2468.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2472.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2474.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2481.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2507.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2508.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2511.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2529.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2530.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2562.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2563.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2578.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2591.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2592.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2602.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2612.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2615.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2620.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2623.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2625.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2677.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2678.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2686.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2688.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2701.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2720.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2748.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2752.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2762.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2763.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2801.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2807.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2827.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2828.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2830.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2831.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2836.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2841.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2846.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2851.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2854.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2863.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2883.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2884.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2885.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2889.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2901.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2916.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2918.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2929.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2937.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2939.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2940.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2949.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2964.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2967.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2974.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst2985.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3010.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3016.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3018.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3021.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3058.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3061.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3062.xdti_16f_9t_96_mux21 72.22 100.00 16.67 100.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3070.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3086.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3088.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3093.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3102.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3108.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3118.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3135.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3150.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3152.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3155.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3158.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3172.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3178.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3180.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3185.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3211.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3241.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3246.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3251.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3271.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3280.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3288.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3302.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3310.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3312.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3354.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3356.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3361.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3366.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3369.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3371.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3412.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3426.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3432.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3433.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3438.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3443.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3450.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3452.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3471.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3472.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3495.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3496.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3522.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3526.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3530.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3538.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3548.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3551.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3558.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3562.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3578.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3591.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3612.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3626.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3640.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3643.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3652.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3653.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3659.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3662.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3666.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3672.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3673.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3697.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3699.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3721.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3722.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3729.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3730.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3731.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3732.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3734.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3738.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3762.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3772.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3785.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3786.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3793.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3800.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3820.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3822.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3825.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3827.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3838.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3848.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3850.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3859.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3861.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3884.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3896.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3897.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3905.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3906.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3917.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3921.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3922.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3926.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3974.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3984.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3995.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3996.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst3999.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4005.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4029.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4037.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4042.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4043.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4045.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4061.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4069.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4077.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4079.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4093.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4128.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4132.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4136.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4140.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4151.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4164.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4173.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4184.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4190.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4207.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4209.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4223.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4224.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4234.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4235.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4240.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4257.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4282.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4286.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4304.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4306.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4337.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4338.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4339.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4344.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4346.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4350.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4355.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4356.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4367.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4373.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4377.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4379.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4392.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4403.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4405.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4411.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4430.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4431.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4453.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4468.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4473.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4477.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4499.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4546.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4552.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4562.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4567.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4569.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4588.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4589.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4590.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4611.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4624.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4639.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4670.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4693.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4700.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4701.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4707.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4710.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4730.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4736.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4744.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4746.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4751.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4758.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4765.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4789.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4793.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4796.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4800.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4825.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4843.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4845.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4847.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4848.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4853.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4857.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4864.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4881.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4883.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4896.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4923.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4933.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4961.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4966.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4981.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4987.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4997.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst4998.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5012.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5014.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5026.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5030.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5032.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5036.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5037.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5046.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5066.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5074.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5078.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5085.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5086.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5094.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5100.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5106.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5122.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5131.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5132.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5138.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5144.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5156.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5160.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5162.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5169.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5177.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5180.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5190.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5197.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5205.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5208.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5227.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5228.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5232.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5233.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5235.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5274.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5275.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5300.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5315.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5325.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5335.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5347.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5349.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5364.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5368.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5369.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5372.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5385.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5391.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5393.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5417.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5422.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5425.xdti_16f_9t_96_mux21 72.22 100.00 16.67 100.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5452.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5480.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5486.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5491.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5500.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5507.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5515.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5520.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5538.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5540.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5557.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5559.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5570.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5582.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5583.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5592.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5598.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5612.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5627.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5632.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5643.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5663.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5664.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5667.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5681.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5685.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5686.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5693.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5725.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5731.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5734.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5743.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5763.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5768.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5774.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5779.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5786.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5790.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5796.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5809.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5828.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5834.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5838.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5839.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5843.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5849.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5852.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5853.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5863.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5875.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5877.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5878.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5887.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5909.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5913.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5916.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5918.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5931.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5943.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5964.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5970.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5975.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5979.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5985.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5988.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5990.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst5997.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6007.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6042.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6044.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6047.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6048.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6051.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6072.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6075.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6077.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6080.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6105.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6113.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6117.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6143.xdti_16f_9t_96_mux21 72.22 100.00 16.67 100.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6148.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6153.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6158.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6166.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6174.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6179.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6207.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6214.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6232.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6269.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6271.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6272.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6286.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6303.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6307.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6313.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6329.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6332.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6382.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6389.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6404.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6411.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6418.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6431.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6448.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6451.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6453.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6459.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6476.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6477.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6480.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6489.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6493.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6497.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6498.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6533.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6549.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6558.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6567.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6592.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6594.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6595.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6599.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6614.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6616.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6623.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6624.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6626.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6630.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6645.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6653.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6656.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6675.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6692.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6698.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6707.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6709.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6711.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6713.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6714.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6731.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6747.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6765.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6770.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6771.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6772.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6773.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6774.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6784.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6786.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6798.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6824.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6825.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6826.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6828.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6834.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6836.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6848.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6857.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6865.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6867.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6878.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6880.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6886.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6894.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6898.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6899.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6907.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6920.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6929.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6932.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6943.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6944.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6963.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6977.xdti_16f_9t_96_mux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst6978.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7009.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7013.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7026.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7032.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7050.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7051.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7058.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7074.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7086.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7088.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7104.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7113.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7117.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7121.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7128.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7130.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7133.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7134.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7148.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7153.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7161.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7162.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7189.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7193.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7200.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7210.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7214.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7224.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7227.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7228.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7240.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7250.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7261.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7262.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7272.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7274.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7277.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7281.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7293.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7297.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7311.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7316.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7320.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7333.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7341.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7342.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7343.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7345.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7348.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7383.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7400.xdti_16f_9t_96_mux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7417.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7420.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7436.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7444.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7447.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7477.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7487.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7493.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7494.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7503.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7513.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7515.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7525.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7527.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7532.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7567.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7583.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7619.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7622.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7635.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7636.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7637.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7639.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7642.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7649.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7657.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7682.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7699.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7704.xdti_16f_9t_96_mux21 72.22 100.00 16.67 100.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7708.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7713.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7715.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7717.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7725.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7728.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7738.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7756.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7766.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7789.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7795.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7813.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7815.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7817.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7843.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7865.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7878.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7880.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7890.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7913.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7917.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7920.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7930.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7932.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7940.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7942.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7954.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7957.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7959.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7960.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7965.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7966.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7972.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7984.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst7993.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8003.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8005.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8016.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8017.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8019.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8021.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8022.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8033.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8035.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8042.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8046.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8085.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8091.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8114.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8146.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8148.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8149.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8163.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8181.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8194.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8207.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8219.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8241.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8247.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8274.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8277.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8285.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8288.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8290.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8302.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8306.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8320.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8321.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8323.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8325.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8330.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8349.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8358.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8367.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8373.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8374.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8377.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8383.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8403.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8420.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8443.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8452.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8472.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8475.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8478.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8483.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8493.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8512.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8518.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8524.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8531.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8541.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8543.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8545.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8550.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8563.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8565.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8574.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8576.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8589.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8595.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8613.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8616.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8625.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8626.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8647.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8648.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8650.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8651.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8653.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8654.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8685.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8691.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8696.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8701.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8716.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8724.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8732.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8735.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8745.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8748.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8749.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8752.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8754.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8755.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8769.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8791.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8809.xdti_16f_9t_96_mux21 72.22 100.00 16.67 100.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8810.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8840.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8849.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8850.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8855.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8856.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8864.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8871.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8873.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8907.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8919.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8923.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8925.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8928.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8930.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8941.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8943.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8948.xdti_16f_9t_96_mux21 72.22 100.00 16.67 100.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8953.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8961.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8962.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8976.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst8997.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9006.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9008.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9018.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9023.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9032.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9033.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9037.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9040.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9050.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9078.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9104.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9105.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9106.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9107.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9121.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9128.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9138.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9141.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9145.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9146.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9157.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9164.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9170.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9192.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9206.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9211.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9218.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9221.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9228.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9231.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9236.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9246.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9255.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9273.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9296.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9312.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9323.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9325.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9327.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9334.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9336.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9339.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9344.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9347.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9354.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9368.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9378.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9389.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9408.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9417.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9452.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9457.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9470.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9474.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9475.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9482.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9500.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9502.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9525.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9532.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9533.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9557.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9572.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9586.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9587.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9588.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9590.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9593.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9602.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9635.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9648.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9657.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9659.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9660.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9666.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9675.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9684.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9714.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9721.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9733.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9744.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9759.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9772.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9778.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9786.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9790.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9793.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9815.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9816.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9820.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9828.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9838.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9855.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9866.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9869.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9873.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9882.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9883.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9894.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9898.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9929.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9933.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9937.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9940.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9959.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9967.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9970.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9971.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9978.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9987.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9990.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9992.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9993.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst9994.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10003.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10007.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10015.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10018.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10021.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10024.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10028.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10043.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10054.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10061.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10062.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10074.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10076.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10100.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10108.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10112.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10113.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10115.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10118.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10135.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10151.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10163.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10168.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10211.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10221.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10232.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10235.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10238.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10246.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10249.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10258.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10282.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10283.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10284.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10289.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10294.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10295.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10296.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10309.xdti_16f_9t_96_ckmux21.xmux21 36.11 50.00 8.33 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10347.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10355.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10361.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10385.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10412.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10437.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10442.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10447.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10448.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10467.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10468.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10470.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10473.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10485.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10505.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10507.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10520.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10539.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10543.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10545.xdti_16f_9t_96_mux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10554.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10563.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10568.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10575.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10581.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10582.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10586.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10589.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10614.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10619.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10628.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10629.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10635.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10655.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10660.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10664.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10676.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10677.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10688.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10717.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10739.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10744.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10749.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10761.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10764.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10771.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10782.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10792.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10797.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10801.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10810.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10815.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10820.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10835.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10842.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10848.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10849.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10851.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10875.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10879.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10887.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10898.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10900.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10914.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10927.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10935.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10942.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10965.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10966.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst10983.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11001.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11026.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11038.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11039.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11040.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11048.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11049.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11057.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11081.xdti_16f_9t_96_mux21 72.22 100.00 16.67 100.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11103.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11113.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11117.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11128.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11139.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11144.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11153.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11167.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11192.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11193.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11194.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11207.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11216.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11222.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11226.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11231.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11234.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11241.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11243.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11250.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11259.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11261.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11273.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11294.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11314.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11315.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11320.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11327.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11333.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11335.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11340.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11347.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11351.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11354.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11364.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11366.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11368.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11377.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11379.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11381.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11388.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11398.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11399.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11401.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11404.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11410.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11412.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11431.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11456.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11458.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11463.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11469.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11470.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11477.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11487.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11499.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11503.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11508.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11510.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11520.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11521.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11524.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11533.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11567.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11568.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11575.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11578.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11579.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11588.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11591.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11601.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11610.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11619.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11628.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11629.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11633.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11637.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11640.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11661.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11667.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11682.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11690.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11696.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11701.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11708.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11717.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11730.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11770.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11797.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11818.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11824.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11850.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11860.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11880.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11886.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11903.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11910.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11924.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11925.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11926.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11933.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11936.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11948.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11963.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11976.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst11994.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12009.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12024.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12032.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12071.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12075.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12078.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12090.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12097.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12099.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12120.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12122.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12131.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12149.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12165.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12193.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12212.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12217.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12219.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12222.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12236.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12239.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12244.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12253.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12255.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12263.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12266.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12273.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12275.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12276.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12291.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12302.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12316.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12324.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12332.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12347.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12360.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12381.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12390.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12416.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12418.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12421.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12426.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12431.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12435.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12452.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12466.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12478.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12482.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12505.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12519.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12523.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12524.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12541.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12561.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12562.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12566.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12578.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12580.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12582.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12592.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12594.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12599.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12602.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12613.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12620.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12639.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12646.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12680.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12681.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12686.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12712.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12723.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12724.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12726.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12731.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12735.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12749.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12752.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12756.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12777.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12787.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12791.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12802.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12812.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12827.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12845.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12854.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12866.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12867.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12872.xdti_16f_9t_96_ckmux21.xmux21 38.89 50.00 16.67 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12894.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12897.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12898.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12902.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12907.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12909.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12910.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12919.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12943.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12944.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12951.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12952.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12960.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12961.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12976.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst12995.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13020.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13022.xdti_16f_9t_96_mux21 72.22 100.00 16.67 100.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13026.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13027.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13036.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13044.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13052.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13058.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13068.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13094.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13106.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13117.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13119.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13121.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13155.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13157.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13164.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13196.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13202.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13207.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13208.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13223.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13224.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13225.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13231.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13245.xdti_16f_9t_96_ckmux21.xmux21 44.44 50.00 33.33 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13246.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13249.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13256.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13270.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13271.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13272.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13275.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13281.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13299.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13301.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13302.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13323.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13343.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13351.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13368.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13375.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13384.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13396.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13415.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13420.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13423.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13432.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13440.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13441.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13452.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13453.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13469.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13491.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13493.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13507.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13510.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13535.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13546.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13548.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13565.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13568.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13577.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13593.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13607.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13616.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13618.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13630.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13634.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13644.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13651.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13656.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13659.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13666.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13670.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13673.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13676.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13679.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13680.xdti_16f_9t_96_ckmux21.xmux21 50.00 50.00 50.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13681.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13690.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13710.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13717.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13728.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13730.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13732.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13738.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13760.xdti_16f_9t_96_ckmux21.xmux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13767.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13769.xdti_16f_9t_96_mux21 0.00 0.00 0.00 0.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13770.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13779.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13782.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13802.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13805.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00
config_ss_tb.DUT.memory_ss.ddr_wrapper.dti_tm16_phy.dti_tm16ffcd4lp4r2_18d_dq8_jm[3].xinst13815.xdti_16f_9t_96_mux21 33.33 50.00 0.00 50.00

Cond Coverage for Module : dti_mux21
TotalCoveredPercent
Conditions22100.00
Logical22100.00
Non-Logical00
Event00

 LINE       7930
 EXPRESSION (S ? D1 : D0)
             1
-1-Status
0Covered
1Covered
Toggle Coverage for Module : dti_mux21
TotalCoveredPercent
Totals 6 3 50.00
Total Bits 12 7 58.33
Total Bits 0->1 6 4 66.67
Total Bits 1->0 6 3 50.00

Ports 6 3 50.00
Port Bits 12 7 58.33
Port Bits 0->1 6 4 66.67
Port Bits 1->0 6 3 50.00

Port Details
NameToggleToggle 1->0Toggle 0->1Direction
VDD No No No INPUT
VSS No No No INPUT
Z Yes Yes Yes OUTPUT
D0 Yes Yes Yes INPUT
D1 Yes Yes Yes INPUT
S No No Yes INPUT

Branch Coverage for Module : dti_mux21
Line No.TotalCoveredPercent
Branches 2 2 100.00
TERNARY 7930 2 2 100.00 



7930       assign Z = S ? D1 : D0;
                        -1-  
                        ==>  
                        ==>

Branches:
-1-Status
1 Covered
0 Covered

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%